Digital Verification Engineer RHESO.TECH

Caen (14)CDI
Il y a 20 jours

Description du poste

Digital Verification Engineer (W/M)

  • Contract Type: Full-time (CDI)
  • Location: Caen, remote possible on conditions
  • Ref: 1466
  • Contact: ******************

Recruiting Company:
French fabless semiconductor manufacturer specialized in the design and marketing of highly integrated, mixed-signal semiconductor products for markets demanding wideband and low power analog-to-digital, digital-to-analog conversion.

Role:
The Verification Team is seeking a dynamic and highly motivated Digital IC Verification Engineer who will take part in the verification of a state-of-the-art complex and large SoC for the Communications market.
The candidate will verify the ASIC's digital functions in collaboration with digital and mixed-signal IC design engineers.

Responsibilities:
  • Develop and apply verification methodologies, creating verification plans aligned with circuit specifications.
  • Write top-level self-checking test benches, including VIPs, subsystems, blocks.
  • Execute regression tests on RTL and gate-level netlists as per verification plans.
  • Contribute to the Analog design team's mixed signal simulations.
  • Provide support with the evaluation of ASIC manufacturing in the measurement lab.
  • Teamwork to successfully verify a state-of-the-art ASIC; document final test procedures adhering with QA policy.

Requirements:
  • You hold a Master's Degree or Ph.D. in Electrical Engineering or equivalent, with 3+ years hands-on experience in RTL verification of digital IC and strong understanding of digital signal processing and related mathematics.
  • You acquired years of experience in coding and verification, and excel in VHDL/SystemVerilog, UVM usage, scripting languages: TCL, Python, Makefile, etc.
  • Your plus experiences: CPU verification (RISC V, ARM) and C-oriented testing, Interface verification (DRAM, Ethernet, PCIe), digital functions verification for Mixed-Signal ICs (A/D Converter, D/A Converter and/or RF transceiver), Cadence or Synopsys Emulators/Simulation flow, Gate-Level Simulation and/or Formal Verification.
  • You are fluent in verbal and written English, demonstrate team playing critical attitude and sense of initiative.


Education:
BAC+5, Master's Degree, Engineering School

RHESO.TECH, a specialized recruitment agency
https://www.rheso.tech/

Key words: Verification, Digital, IC, SOC, ASIC, RTL, Mixed-Signal, Analog, Test, Coding

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Référence : 1466